1.4 Assembly Outputs: Centroid, Rotations, Polarity and Stencil Inputs
SMT programming is a precise coordinate translation task. If the engineering input data is relative, visually ambiguous, or mathematically incorrect, the Pick & Place machine will execute incorrect placements.
The Assembly Output package must provide precise coordinates and a locked visual “truth source” to verify them against. The operational goal is to produce a machine program that runs perfectly on the first pass, eliminating unnecessary back-and-forth where the EMS must ask for rotation clarifications for every polarized IC.
The Controlled Placement Dataset
Section titled “The Controlled Placement Dataset”The Centroid, Pick and Place file (also called XY Data) is the primary numerical driver for assembly. It must be generated programmatically directly from the final CAD database revision. Manual editing, sorting, or copy-pasting in Excel before transmission is prohibited.
Required Data Fields (CSV/ASCII):
Section titled “Required Data Fields (CSV/ASCII):”- RefDes: (e.g., U1, R1). The unique primary key that must perfectly match the BOM.
- Layer: (Top/Bottom).
- Location X: Center of the physical component body (Not Pin 1).
- Location Y: Center of the physical component body.
- Rotation: (0–360 degrees).
- Package/Footprint: (e.g., SOIC-8). Highly useful for verifying machine nozzle selection.
Intake Review:
Section titled “Intake Review:”- When the Centroid file separates the Top and Bottom sides into completely different files, they should be merged or explicitly labeled. Ambiguity here can lead to side-placement mismatches.
- When coordinates are relative to an arbitrary local origin rather than the absolute board origin (0,0), the file will be rejected. Coordinates must refer to the global panel or board fiducials.
Rotation Architecture: The “Zero” State
Section titled “Rotation Architecture: The “Zero” State”Rotation data is the single most frequent data-driven cause of placement defects. Providing a value of “90 degrees” is incomplete unless the baseline “0 degree” state is explicitly defined.
The Root Problem:
Section titled “The Root Problem:”- CAD Library Zero: The arbitrary orientation the component was drawn in the local library.
- IPC-7351 Zero: The standard orientation (usually Pin 1 Upper Left or Top).
- Tape & Reel Zero: The physical orientation of the part resting in the pocket of the tape.
Since these three “Zeros” frequently conflict, a Polarity Reference Map is strictly required.
The Polarity Reference Map
Section titled “The Polarity Reference Map”Relying solely on the Silkscreen layer is insufficient, as it may be clipped by pads or physically hidden under component bodies. A dedicated ”.PDF” Assembly Drawing must be included that explicitly shows:
- Pin 1 Dot: Clearly visible for all ICs.
- Cathode Band: Clearly marked and unambiguous for Diodes and Tantalum capacitors.
- Connector Keying: The notch or latch position heavily indicated.
Pro-Tip: For physically symmetric connectors (e.g., USB-C), a non-symmetric mark on the assembly drawing layer must be used to explicitly indicate the “Front” or “Pin 1” side to prevent a 180-degree reversal.
Stencil & Paste Inputs
Section titled “Stencil & Paste Inputs”The
Input Requirements:
Section titled “Input Requirements:”- 1:1 Output: The paste layer must be exported perfectly 1:1 with the copper pads (unless the specific CAD library already incorporates advanced reduction). The EMS or Stencil Vendor will apply the global aperture reduction (typically 10% to 20%) based on their specific stainless steel foil thickness and blade chemistry.
- Exclusions: Non-soldered features (e.g., test points, fiducials, gold edge fingers, thermal vias) must be completely void of
solder paste data. - Review: When optical fiducials have
solder paste openings, the machine vision system will fail once shinysolder paste is printed over them, stopping the production line.
Data Validation Logic: The “Sanity Check”
Section titled “Data Validation Logic: The “Sanity Check””Before compiling the Gerber Data Package (GDP) for manufacturing, these specific validation checks must be executed.
1. The BOM vs. Centroid Count
Section titled “1. The BOM vs. Centroid Count”- Process: The row count of every RefDes in the BOM (excluding DNPs) must be summed. The count of coordinates in the Centroid file must be summed.
- Logic:
- When the BOM count exceeds the Centroid count, the DNP list must be verified to ensure the missing parts are intentionally tagged as unpopulated.
- When the Centroid count exceeds the BOM count, this creates a critical error where the Pick & Place machine is instructed to place parts that do not exist in the purchasing list.
2. The Fiducial Audit
Section titled “2. The Fiducial Audit”- Requirement: Minimum of 3 Global Fiducials per side (Top/Bottom) and per outer Panel rail.
- Check: Fiducials must be verified to exist in the Centroid file with X,Y coordinates, or have a distinct entry in the Drill/Gerber data.
3. The Diode Direction Audit
Section titled “3. The Diode Direction Audit”- Process: 3 diodes and 3 ICs in the output data must be randomly spot-checked.
- Check: The numerical Rotation angle in the file must be compared against the Assembly Drawing and the IPC footprint standard.
- Action: If “0” degrees physically points West on the drawing but North in the standard, a rotation correction note must be added to the Fabrication/Assembly Instructions.
Final Checkout: Assembly outputs: centroid, rotations, polarity and stencil inputs
Section titled “Final Checkout: Assembly outputs: centroid, rotations, polarity and stencil inputs”| The Control Point | The Operational Requirement | The Go/No-Go Metric |
|---|---|---|
| File Format | CSV / ASCII Text. | Machine readable; perfectly clean headers. |
| Coordinates | Metric (mm) highly preferred. | Must be consistent with Gerber master units. |
| Origin Point | Board/Panel 0,0 location. | Matches the Gerber global origin exactly. |
| Fiducials | Included in dataset. | X, Y coordinates are physically present. |
| RefDes Match | 100% Match to BOM (minus DNP parts). | Zero “orphan” coordinates allowed. |
| Polarity Map | Explicit PDF Assembly Drawing. | Pin 1/Cathode strictly and clearly visible. |
| Paste Layer | 1:1 export (or explicitly specified otherwise). | Zero paste allowed on fiducials or test points. |