1.3 CAD/CAM Outputs: Fabrication Package Definition

The fabrication package is the physical blueprint for the bare PCB substrate. If this data is incomplete, contradictory, or ambiguous, the PCB fabricator (the CAM engineer) will fill in the gaps with their own assumptions. Assumptions in manufacturing are the root cause of “silent failures”—boards that pass electrical continuity testing at the factory but fail intermittently in the field due to incorrect impedance routing, mismatched dialectics, or incorrect material selection.

Define “Fab-Ready” as a controlled dataset that requires exactly zero Engineering Queries (EQs) to interpret. The operational goal is to move entirely from “CAM Interpretation” to “CAM Execution.”

The Primary Data Format

Select one intelligent data format and enforce it globally. Do not mix formats within a single release package.

Option A: Intelligent Formats (Highly Recommended)

Use ODB++ (.tgz) or IPC-2581 (.xml).

• Why: These are single-file containers that embed netlists, stackups, and drill data in a highly structured hierarchy. They eliminate the risk of missing layers, misaligned drill files, or scale errors.
• The IPC-2581 Advantage: This XML-based standard allows bi-directional data exchange and explicitly defines stackup materials at the machine level, preventing the classic “PDF vs. Gerber” conflict.

Option B: Legacy Gerbers (RS-274X / X2)

If you are required to use legacy Gerbers due to toolchain limitations, you must bundle the following explicitly. A loose collection of .gbr files is not a valid fabrication package.

1. Gerber Files: All copper, mask, silkscreen, and paste layers.
2. NC Drill File: Excellon format. You must explicitly specify units (English/Metric) and coordinate suppression (Leading/Trailing zeros) in the manifest.
3. IPC-D-356 Netlist: Required for Bare-Board Electrical Test (BBET). Without this file, the fab only checks if the physical board matches the Gerbers, not if the Gerbers actually match the engineering schematic.

Essential Fabrication Elements

To prevent CAM assumptions, the following elements must be explicitly defined and locked in the data pack:

1. The Board Outline & Profile

Do not rely solely on the copper pour to define the board edge.

• Requirement: A dedicated “Mechanical” or “Profile” layer containing a continuous, perfectly closed zero-width line.
• Review: When the outline is open, overlapping, or duplicated across multiple layers, the router path becomes undefined, risking board dimension failures.

2. Drill Definitions

Ambiguous drill charts directly cause hole-size and plating violations.

• Separation: You must strictly separate Plated Through Holes (PTH) from Non-Plated Holes (NPTH) in the drill file headers.
• Tolerance: Define exact tolerances per hole type (e.g., Press-fit connectors require significantly tighter tolerances than standard thermal vias).
• Slot/Route: Define physical slots in a specific Drill_Plated or Route layer, not sketched on the board outline layer.

3. Stackup & Impedance Table

Never bury critical stackup requirements in an email thread. Embed them directly in the fabrication drawing or the ODB++/IPC-2581 metadata.

• Material Specification: Specify the exact IPC-4101 slash sheet (e.g., /126 for High Tg FR-4), not a vendor brand name (e.g., “Isola 370HR”). Brand names financially lock the supply chain; IPC specs allow for resilient equivalent substitutions.
• Impedance Control: List the target impedance (e.g., 50Ω SE), the required reference layer, and the trace width required to achieve it.
• Review: When impedance is critical to the RF or High-Speed digital design, add a “Test Coupon” requirement to the fabrication notes.

The Fabrication Drawing

The Fab Drawing serves as a formal agreement. If a specific requirement is not physically on this drawing, the fabricator is not liable for missing it.

Mandatory Drawing Notes:

• Class: IPC-6012 Class 2 (Standard) or Class 3 (High Reliability).
• Surface Finish: ENIG, HASL, Immersion Silver, etc. (Explicitly specify thickness if critical to the assembly process).
• Color Profile: Solder mask and Silkscreen color codes.
• Standards: “Workmanship shall conform to IPC-A-600.”

Engineering Rule: Add a “Do Not X-Out” note if your internal pick-and-place machines cannot optically handle panelized boards with bad units. Otherwise, fabs will deliver panels with rejected boards crossed out with a marker, which can disrupt your SMT line.

The Netlist Compare Rule

The most critical safety net in PCB fabrication is the Netlist Compare.

The Required Process:

1. Output Export: Generate IPC-D-356 netlist directly from CAD.
2. Factory Intake: Fab CAM extracts a raw netlist from the Gerbers/ODB++ layers.
3. The Compare: The CAM system mathematically compares the CAD Netlist vs. the Gerber Netlist.

Review ⭢ Action:

• When a short or open is detected, the build must be paused. This indicates the generated Gerbers do not match the electrical design (schematic).
• The Mandate: Explicitly state in bold on the Fab Drawing: “Electrical Test 100% required against IPC-D-356 Netlist.”

Final Baseline Checklist

The Control Point	The Operational Requirement	The Go/No-Go Metric
Data Format	ODB++ / IPC-2581 / Gerber+Drill.	Single archive, valid checksum verified.
The Netlist	IPC-D-356 included in archive.	Perfectly matches the CAD database.
Board Outline	Closed, single continuous contour.	Mechanical layer is clear of aesthetic debris.
The Stackup	Defined strictly in drawing or file metadata.	Dielectric thickness & copper weight are perfectly explicit.
Drill Data	Strict PTH/NPTH separation.	Drill chart perfectly matches tool sizes.
Fab Notes	Material, Class, Finish explicitly defined.	Zero “TBD” values allowed in the notes.