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    1.3 CAD/CAM Outputs: Fabrication Package Definition

    The fabrication package contains the manufacturing data for the bare PCB substrate. If this data is incomplete, contradictory, or ambiguous, the PCB fabricator’s CAM engineer will have to fill in the gaps with their own assumptions. These assumptions are a primary cause of “silent failures”—boards that pass electrical continuity testing at the factory but exhibit field failures due to issues like incorrect impedance routing, mismatched dielectrics, or improper material selection.

    Therefore, a “Fab-Ready” dataset must be defined as a controlled package that requires zero Engineering Queries (EQs) to interpret. The operational goal is to move entirely from “CAM Interpretation” to “CAM Execution.”

    A single, intelligent data format must be selected and enforced globally for each release. Mixing formats within a single package is not permitted.

    Section titled “Option A: Intelligent Formats (Highly Recommended)”

    Use ODB++ (.tgz) or IPC-2581 (.xml).

    • Why: These are single-file containers that embed netlists, stackups, and drill data in a highly structured hierarchy. They eliminate common risks like missing layers, misaligned drill files, or scale errors.
    • The IPC-2581 Advantage: This XML-based standard allows for bi-directional data exchange and explicitly defines stackup materials in a machine-readable format, which helps prevent conflicts that can arise from using separate documentation like PDFs.

    If legacy Gerbers are required due to toolchain limitations, the following items must be explicitly bundled together. A loose collection of .gbr files does not constitute a valid fabrication package.

    1. Gerber Files: All copper, solder mask, silkscreen, and solder paste layers.
    2. NC Drill File: In Excellon format. The manifest must explicitly specify the units (English/Metric) and coordinate suppression mode (Leading/Trailing zeros).
    3. IPC-D-356 Netlist: This file is required for Bare-Board Electrical Test (BBET). Without it, the fabricator can only verify that the physical board matches the Gerber files, not that the Gerbers themselves match the original engineering schematic.

    To prevent the CAM engineer from making assumptions, the following elements must be explicitly defined and locked within the data package.

    You cannot rely on the edge of the copper pour to define the board shape.

    • Requirement: A dedicated “Mechanical” or “Profile” layer must contain a continuous, perfectly closed line with zero width.
    • Review: If the outline is open, overlapping, or duplicated across multiple layers, the router path becomes undefined. This ambiguity risks producing boards with incorrect dimensions.

    Ambiguous drill charts directly lead to incorrect hole sizes and plating.

    • Separation: Plated Through Holes (PTH) and Non-Plated Holes (NPTH) must be strictly separated in the headers of the drill file.
    • Tolerance: Exact tolerances must be defined for each hole type. For example, press-fit connectors require significantly tighter tolerances than standard thermal vias.
    • Slot/Route: Physical slots must be defined in a specific “Drill_Plated” or “Route” layer. Defining them on the board outline layer is not acceptable.

    Critical stackup requirements must not be buried in email threads. They must be embedded directly in the fabrication drawing or within the ODB++/IPC-2581 metadata.

    • Material Specification: Specify the exact IPC-4101 slash sheet (e.g., /126 for High Tg FR-4). Avoid using vendor brand names (e.g., “Isola 370HR”), as they restrict sourcing to a specific supplier. IPC specifications allow for resilient, equivalent material substitutions.
    • Impedance Control: List the target impedance (e.g., 50Ω single-ended), the required reference layer, and the trace width needed to achieve it.
    • Review: For designs where impedance is critical to RF or high-speed digital performance, add a requirement for a “Test Coupon” in the fabrication notes.

    The Fab Drawing serves as a formal agreement. If a specific requirement is not documented on this drawing, the fabricator is not liable for missing it.

    • Class: IPC-6012 Class 2 (Standard) or Class 3 (High Reliability).
    • Surface Finish: ENIG, HASL, Immersion Silver, etc. (Explicitly specify thickness if it is critical to the assembly process).
    • Color Profile: Solder mask and silkscreen color codes.
    • Standards: “Workmanship shall conform to IPC-A-600.”

    The most critical verification step in PCB fabrication is the Netlist Compare.

    1. Output Export: An IPC-D-356 netlist must be generated directly from your CAD software.
    2. Factory Intake: The fabricator’s CAM system extracts a raw netlist from the provided Gerber or ODB++ layers.
    3. The Compare: The CAM system performs a comparison between the CAD netlist and the netlist extracted from the fabrication data.
    • If a short or open is detected, the build must be paused. This indicates that the generated fabrication data does not match the original electrical design (schematic).
    • The Requirement: State explicitly on the Fab Drawing: “Electrical Test 100% required against IPC-D-356 Netlist.”

    Recap: CAD/CAM Outputs Fabrication Package Definition

    Section titled “Recap: CAD/CAM Outputs Fabrication Package Definition”
    ParameterRequirementValue / SpecificationAction / Condition
    Primary Data FormatSingle, intelligent format mandatory. Mixing prohibited.ODB++ (.tgz) or IPC-2581 (.xml). Legacy Gerber requires explicit bundle.Eliminates layer, drill, and scaling errors.
    Board OutlineExplicitly defined on dedicated layer.Continuous, perfectly closed zero-width line on “Mechanical” or “Profile” layer.Prevent dimensional errors from ambiguous router path.
    Drill DefinitionPTH and NPTH strictly separated. Tolerances defined.Excellon NC Drill file. Units and coordinate suppression mode specified. Slots defined in specific “Drill_Plated” or “Route” layer.Prevent hole size and plating violations.
    Stackup & ImpedanceEmbedded in fab drawing or metadata.IPC-4101 slash sheet (e.g., /126). Target impedance, reference layer, and trace width specified. For critical RF/high-speed: require test coupon.Prevent material and impedance conflicts.
    Fabrication DrawingFormal agreement; defines manufacturer liability.IPC-6012 Class (2/3), Surface Finish (type/thickness), Solder Mask/Silkscreen Color, “Workmanship to IPC-A-600”. Note: “Do Not X-Out” if required for assembly.All critical requirements must be documented here.
    Netlist CompareMandatory safety check.IPC-D-356 netlist required. Fab Drawing must state: “Electrical Test 100% required against IPC-D-356 Netlist.”Pause build if short/open detected (data ≠ schematic).

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