3.5 Defect Mechanisms & Fixes
EveryReflow soldering defects are the consequence of failed controls upstream: paste, stencil, placement, or profile. Correct troubleshooting requires disciplined analysis of the defect tellsmechanism ato storyidentify aboutthe imbalanceroot cause in the process.process Tombstones hint at uneven pad wetting, voids expose trapped volatiles, and head-in-pillow reveals warpage or weak flux. While the symptoms show up after reflow, their roots often lie upstream in printing, stencil design, or subtle profile details like soak length and TAL.chain. The fastest pathfailure to stability is rarely wholesale change, but instead the smallest targeted fix that restores balance—whether that’s adjusting apertures, cleaning the stencil, tweaking blower speed, or softeningdistinguish a thermalprint-related ramp.defect When(volume/alignment) eachfrom mechanisma isthermal-related understood,defect defects(wetting/balance) stopguarantees beingcontinuous, mysteriescostly and start becoming predictable, solvable patterns.rework.
3.5.1 HowSolder to debugBridging (the 10-minute rhythm)Shorts)
ConfirmMechanism: Excessive solder paste volume connects neighboring pads, usually on fine-pitch components (QFP, BGA outer rows). The molten solder's surface tension is overcome by theprint.excessiveCheckvolume,SPIallowingoncoalescencethebetweenparts that fail: volume/height/area stable? If not, fixpads.Chapter 7items first.Sort by family.Are fails clustered onchips,QFN thermals,BGAs, orpower pads? Each has a usual culprit.Read the oven story.Pull the lastprofile: ramp, soak, TAL, peak, ΔT. If it disobeys the paste or parts, correct that before anything else.Change one thing.Re-run a small lot and verify withAOI/AXI. Don’t shotgun.
3.5.2 Quick map (symptom → root → first fix)
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| SPI (Chapter 1.6) must show Area/Volume below the "Bridge" limit. |
Misalignment/Smear | Printer alignment drift or poor gasket seal (solder smears under stencil). | Check |
Excessive Slump | Paste is too warm, past expiration, or solvent loss (rheology failure). | Check |
Too Long TAL | Excessive time above liquidus allows solder to flow too far. | Shorten |
3.5.2 Tombstoning (Manhattan Effect)
Mechanism: Unequal wetting forces on a component's opposite pads cause it to stand on one end, creating an open circuit. This occurs when the solder on one pad melts and pulls the component upright while the solder on the opposite pad is still solid or lagging. This is most common on small, light passives (0402, 0201).
Root Cause | Fix and Control Point | Process Check |
Uneven Heating (∆T) | One pad is connected to a thermal mass (plane/via), the other is isolated. | Thermal Profile (Chapter 3.2) must achieve minimal ∆T across the board (Soak profile preferred). |
Unequal Paste Volume | One pad has significantly more paste (higher surface tension). | SPI must confirm volume symmetry (±5%) on both pads. Use Home-Plate Apertures (Chapter 1.4) to balance forces. |
Fast Wetting | The transition to liquidus is too quick, maximizing the surface tension torque. | Slow down Ramp Rate (1–2˚C/sec) and ensure adequate preheat time. |
Placement Skew | Component placed with a significant offset, causing one end to contact the paste poorly. | Verify Placement Accuracy and Coplanarity during First Article (Chapter 2.5). |
3.5.3 Head-in-Pillow (HIP)
Mechanism: The solder ball on the BGA component and the solder paste on the PCB pad melt but fail to fully coalesce, forming a weak mechanical interface (a latent defect that often passes electrical test but fails in the field under stress). This is almost exclusively due to warpage and oxidation.
Root Cause | Fix and Control Point | Process Check |
Package/PCB Warpage | Component or board lifts during the high-heat zones, allowing the ball to oxidize. | Implement PCB/BGA flatness screening at incoming. Use lower peak temperature (if possible) to minimize warpage. |
Oxide Layer | Oxide forms on the lifted BGA ball, and the paste's flux is too weak/spent to clean it upon recontact. | Use |
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3.5.4 Voiding and Cold Joints
Mechanism: Voids are gas bubbles trapped within the solidifying solder, compromising the joint's thermal and electrical conductivity. Cold joints are those where the solder paste did not reach the minimum liquidus temperature (Incomplete Reflow).
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| Stencil Design: |
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Solder |
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| Reflow Profile must show a controlled, gradual ramp rate (≤3˚C/sec). |
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Profile Plot |
Final Checklist: Troubleshooting Reflow Defects
3.5.3 Tombstones & skew (chip passives)
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| Printing ( | Reduce |
Tombstoning | Profile ( | Tune
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| Design/Paste | Revise
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Cold |
| Increase |