5.1 Strategy & Coverage

A well-designed test strategy is the backbone of reliable electronics manufacturing, balancing cost, speed, and coverage across a product’s lifecycle. Structural checks like ICT, flying probe, and BSCAN provide the cheapest certainty by filtering out common build defects before functional testing ever begins. Functional and system-level tests then focus on what truly matters to the end user, ensuring confidence without overloading the line. The art lies in choosing the right mix for product type, volume, and risk, so quality targets are met without turning throughput into the bottleneck

5.1.1 The problem in plain words

You can test forever and still miss things—or test almost nothing and ship pain. The trick is to catch the common, costly faults early (cheap, fast stations) and leave only a small, meaningful set of risks to later, slower tests. We’ll build a mix that hits your defect-per-million (DPPM) and uptime targets without turning the line into a parking lot.

Think in three layers:

Structural: “Is it built right?” (opens, shorts, wrong value/orientation).
Functional: “Does it behave?” (power-up, comms, timing, load).
System: “Does it do the job in context?” (firmware + peripherals + use-case).

Catch structural faults before you waste time on functional ones.

5.1.2 Your test toolbelt (what each is good at)

Tool	What it actually does	Coverage sweet spot	Cost & cycle feel	When to reach for it
ICT (In-Circuit Test)	Nails opens/shorts, wrong values, orientation; powers-on safely and does quick analog checks	High structural coverage on accessible nets; great at passives, nets, power rails	High NRE (fixture), very fast per board	High volume, good probe access (bed-of-nails)
Flying Probe (FPT/MDA)	ICT without a fixture; probes move	Broad structural on low/med volume; ECO-friendly	Low NRE, slower cycle	NPI, low volume, frequent changes
BSCAN (JTAG)	Shifts pins under BGAs, tests hidden nets, programs flash/MCUs	Great under fine-pitch/BGA, chains digital nets	Low NRE, short cycle	Dense boards, limited pads, need in-line programming
FCT (Functional Test)	Powers the board and runs real behaviors	Integration defects, interfaces, timing	Medium NRE (fixture/code), medium–slow cycle	Final confidence; customer-visible features
Boundary “Lite” (Power-on checks)	Smoke test: rails, idle current, clocks	Catastrophic build/polarity faults	Lowest NRE, seconds	Early screen before long tests

Rule of thumb: Structural first, functional last. Let ICT/Flying Probe/BSCAN remove the trash; let FCT prove what matters.

5.1.3 Coverage model (aim by fault class)

Fault class	Typical root	Best detector	Target coverage
Opens/shorts	Solder, via, stencil, handling	ICT/Flying Probe/BSCAN	≈ 95–99% of nets reachable
Wrong value/orientation	Kitting, feeder flips	ICT (value/polarity) + AOI backup	100% of polarized, ≥95% of value-critical
BGA hidden defects	Paste/reflow/HIP	AXI + BSCAN interconnect	Per-ball void/continuity limits met
Power integrity	Assembly + layout	ICT (rails/IR), FCT smoke	100% critical rails
Interface timing/logic	Design/firmware	FCT (loopbacks, loads)	All customer-facing features exercised

Structural coverage (opens/shorts/polarity/value) is the cheapest yield driver. Don’t skimp there.

5.1.4 Strategy by product type (pick your template)

Scenario	Good, fast mix	Why it works
High-volume consumer	AOI → ICT (bed-of-nails) → Short FCT; BSCAN for BGAs + in-line programming	Fixture cost amortizes; ICT slams structural faults; brief FCT checks user features only
Mid-volume industrial	AOI → Flying Probe + BSCAN → Focused FCT	Low NRE; BSCAN covers BGAs; probe cycles acceptable
Safety-critical / medical	AOI/AXI → ICT (max coverage) + BSCAN → Full FCT + burn-in/soak	Compliance + risk; pay the time to prove it
Complex, frequently changing NPI	AOI → Flying Probe + BSCAN → Developer FCT (modular)	Zero/low fixture; changes don’t break the test line

You can start NPI on flying probe, then switch to ICT when the rev stabilizes and volume rises.

5.1.5 Cost math you actually use

Fixture payback (very back-of-napkin):
Break-even qty ≈ Fixture NRE ÷ (Probe-station minutes saved × $/min of line time)
If ICT saves 1 minute per board vs flying probe and your burdened minute is $2, a $60k fixture pays back at ~30k boards.
Cycle time budget: total test time must fit your TAKT. If not, split (parallelize FCT), trim (structural earlier), or batch (programming off-line with BSCAN).

5.1.6 BSCAN planning (earlier than you think)

Put JTAG headers (or test pads) on the PCA early (see 3.4) and chain key devices (MCU/FPGA/flash).
Use BSCAN for digital interconnect under BGAs and programming (saves a whole test step).
Keep the chain short and documented in the Golden Pack; boundary scripts live with test code.

5.1.7 Building the line route (an example that flows)

AOI post-reflow (fast structural cues).
AXI sampling (if BGAs/QFN thermals are high risk).
ICT / Flying Probe + BSCAN (kill structural faults, program devices).
FCT (short, meaningful): power-up, comms, one or two use-case loops with load.
Optional stress (soak/burn-in) for harsh-duty products.
Pack-out with traceability (Chapter 4).

Each step should fail fast to NG flow; don’t push a sick board into a long test.

5.1.8 Coverage & SLA targets (write them down)

Structural net coverage: ≥95% reachable nets tested (ICT/Probe/BSCAN).
Polarity/value: 100% of polarized parts checked; value checks on BOM-critical components.
AXI: BGA collapse/voids within limit on sample rate N per lot.
FCT: All customer-visible functions exercised; power & safety guards always.
Throughput: test stations not the bottleneck; overall First Pass Yield hits plan.
Field: shipped DPPM and RMA within SLA.

If a target slips, decide whether to add coverage (upstream) or tighten the process (printing/reflow/placement).

5.1.9 Fast decision table (print this)

Question	If Yes	If No
Volume high enough to amortize fixture?	Go ICT; keep Flying Probe for ECOs	Stay Flying Probe for now
Lots of BGAs / poor access?	Add BSCAN; plan chain/header early	ICT may be enough
TAKT tight?	Move programming to BSCAN earlier; trim FCT to essentials	Keep longer FCT
Safety/field risk high?	Add AXI sampling + stress; raise structural coverage	Focus on cost & speed
Many ECOs expected?	Keep Probe + BSCAN through ramp	Freeze rev → invest in ICT

5.1.10 Pocket checklists

At NPI kickoff

Fault classes ranked (what would really hurt the customer?)
DFT: pads/headers for ICT/BSCAN planned
Provisional route chosen (Probe vs ICT; AXI need; FCT scope)

Before release to volume

Structural coverage ≥ 95% nets (report attached)
BSCAN scripts + programming times validated
FCT runs inside time budget; features mapped to requirements
SLA written: DPPM, RMA, TAKT, sample rates (AXI)

Continuous improvement

Pareto from AOI/AXI/FCT feeds back to stencil/profile (Ch. 7–9)
Fixture/sequence changes re-timed; dashboard shows test as non-constraint
Field returns loop to update coverage where it counts

In practice, the most efficient strategy catches structural faults early, reserves functional testing for customer-critical behaviors, and evolves coverage based on field data and defect trends. Doing so minimizes wasted time on bad boards, controls cost, and delivers dependable products at scale.