5.2 ICT & Fixture Design

In-circuitCircuit testingTest succeeds(ICT) oris failsthe fastest, most effective way to eliminate 90% of all common structural defects (opens, shorts, wrong parts) in high-volume production. The success of ICT hinges entirely on the strengthNRE of(Non-Recurring itsEngineering) fixture, where mechanics and electronics meetinvestment: the PCBfixture. in a precise, repeatable handshake. A well-designed bed-of-nails not only delivers high coverage at speed but also protects the board from stress while surviving hundreds of thousands of cycles. Every detail—probe grid, tip selection, pad access, guarding, and backup support—determines whether measurements are clean or noisy, and whether the fixture is a quiet workhorse or a constant source of false failures. By pairing disciplined DFT on the PCB with robust fixture mechanics and regular maintenance, ICT becomes the most reliable structural gate in the line.

5.2.1 ICT in plain words (what theThis fixture must do)

An ICT fixture isachieve a precise, repeatable handshake between the testertester's electronics and your PCB. It must:

• Touch the rightPCB's nets (pads/vias/test points) reliably,
• Hold the board flat without cracking anything,
• Power up safely (when needed) and measure cleanly, and
• Survivecircuitry hundreds of thousands of cyclestimes withwithout onlystressing lightor TLC.damaging the board. Failures in ICT are almost always mechanical — dirty pins, worn support plates, or poor

Design for Testability (DFT).

5.2.1 ICT Fundamentals and Fixture Requirements

DesignICT works by powering up the board forsafely testand firstisolating (DFT),individual thencomponents designor nets to measure resistance, capacitance, and basic functionality. The fixture is the fixturemechanism sothat operatorsdelivers can’tthe measurement probes.

The Fixture's Mandate

1. Contact: Reliably and repeatedly touch every required nottest point, net, or component lead succeed.(the "bed-of-nails").

2. Support:

   
   

   Hold

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   the

   
   

   PCB perfectly flat under immense probing force without bowing (oil-canning) or damaging sensitive parts.
3. Safety: Safely apply and limit current during power-up checks and protect sensitive nets from external noise (guarding).

5.2.2 Bed-of-nailsDesign basicsfor Testability (grids,DFT) counts,on forces)the PCB

The PCB design determines the cost and speed of the final ICT process. DFT rules are mandatory to ensure fixture viability.

DFT Parameter	Practical starting pointMandate	Why itIt mattersMatters
ProbeTest gridPad Size ø	1.0 – 1.2 mm for a 100 mil grid. 0.7 – 0.9 mm for a 75 mil grid.	Provides a large, clean target for the probe tip (crown/cup) without skidding.
Test Point Surface	Round ENIG pads with open solder mask (not tented).	ENIG provides a consistent, corrosion-resistant surface for clean electrical contact.
Component Keepouts	Mark no-crush zones (pressure post keepouts) for crystals, large capacitors, and wire-bonded ICs.	Prevents mechanical damage/cracking when the top plate presses down.
Tooling Holes	At least 3 precision tooling holes for X/Y/θ alignment.	Guarantees repeatable mechanical registration for the fixture frame.
Kelvin Pads	Two adjacent pads on high-current paths (e.g., fuses, shunts, power rails).	Allows for 4-wire resistance measurements, eliminating probe resistance from the reading for high accuracy.

5.2.3 Fixture Mechanics: Force, Support, and Tip Selection

The mechanical design ensures that the high probing force (3-8 ounces per pin) is evenly managed.

A) Probe Field and Force

• Probe Grid: 100 mil (2.54 mm) default;is 75the mildefault for densea boards;robust, 50durable milfixture. only if you truly need it

  Tighter grids raise cost/fragility; 100 mil keeps fixtures robust(

  Test pad Ø

  1.0–1.2 mm on 100 mil grid · 0.7–0.9 mm on 75 mil

  ) increase cost and pin wear significantly.

• Total Force Management:Gives crowns/cupsThe atotal cleandownward hitforce withoutfrom skating

  Minhundreds pad pitch

  Pad center ≥ probe grid

  Avoids bentof pins andcan padexceed nicks

  Probe200 forcelbs. perThis pin

  3–8requires ozextensive typical

  Too little → contact noise; too much → board bow

  Total force

  Keep board deflection ≤ 0.5–1.0 mm

  Use plentyuse of backup pins placed beneath large components (like BGAs) and avulnerable stiffareas pressureto plateprevent board

  Actuation

  Vacuum for inline volume; clamshell/pneumatic for benchtop

  Vacuum is fast/consistent; clamshell is flexible for odd shapes

  Support, support, support:bowing lay out aor backup pin fieldoil-canning under largepressure.

• Actuation: copperVacuum pours,fixtures BGAs,are standard for high-volume inline use due to speed and theconsistent thinnestforce laminateapplication. regionsClamshell/Pneumatic sofixtures theare boardpreferred doesn’tfor oil-candebug whenbenches vacuumand pullsodd-shaped down.boards.

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5.2.3

B) Probe tipTip menuMenu

(pick

Tip byselection surfaceis &a job)

maintenance decision; aggressive tips wear faster but ensure contact.

Tip styleStyle	Best forUse Case	NotesNote
Crown / Cup (4/5-point)	Solder-masked pads, ENIG/OSP test points	General purpose;purpose, bitesstandard throughsolder-masked lightpads, filmsENIG.	Most common; good balance of contact and wear.
Spear/Spear / Conical	ViaProbing holes,into small vias-as-pads	viasDon’t overdrive—can “drill”
Flat/Cup	Component leads, round posts, battery tabs	Gentle on plated posts; stable contact area
Chisel/Serrated	Oxidized or roughthrough HASLslightly oxidized surfaces.	Aggressive; increasesensure wear—useadequate sparinglysupport to prevent board drilling.
Kelvin pairPair	Low-ohm ormeasurements precision(shunts, measurementsfuses, power nets).	Two pins for force,Requires two forprobes senseper onnet, theminimizing samemeasurement net
Long-travel / double-plunger	Stack-up tolerances, thick boards	Absorbs Z-variation; slower and costliererror.

Keep a probe legend in the fixture docs (part numbers, spring force, tip style, installed locations).

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5.2.4 DFTElectrical keepouts & test-point rules (do this on the PCB)

• Reserve a grid: mark a 100 mil access grid early; avoid placing tall parts in the nail field you’ll need later.
• Test point spec: round ENIG pads preferred; open mask (no tent). Size per Section 11.2.2.
• Spacing & relief: keep ≥ 1.5 mm solder mask clearance around each test pad so tips don’t skate on gloss.
• Edge clearance: keep tall parts ≥ 5 mm from edges where vacuum seals ride; add tooling holes (3.0/3.2 mm)Design and globalMaintenance fiducials.
• Component

  Clean keepoutsmeasurements under pressure posts: mark no-crush zones for electrolytics, crystals, wirewounds—give theand fixture platelongevity somewhereare safeachieved tothrough push.

• High-currentdisciplined rails:electrical add Kelvin pads (two close pads) for 4-wire resistance/IR drop checks.
• JTAG/BSCAN header/pads: plan chain orderrouting and a small header or robust pads (see 11.1 and 3.4).
  

Golden rule: one net = one reachable point (more for critical nets). Don’t rely on vias buried under parts unless you spec spear tips and access height.maintenance.

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5.2.5 Fixture mechanics (vacuum vs clamshell)

Vacuum (inline volume)

• Pros: fast, consistent force, great for conveyors; easy operator training.
• Cons: needs a gasket seal and a reasonably rectangular outline; sensitive to board bow and leaks.

Clamshell / pneumatic (flexible)

• Pros: loves odd shapes; top plates can “kiss” tall parts with soft foam standoffs; easy debug access.
• Cons: more moving parts; alignment and parallelism matter; cycle time slightly slower.

Always include

• Datum pins + tooling holes → repeatable X/Y/θ.
• Pressure plate with replaceable standoffs/foams → touches only designated topside keepouts.
• Pushback/strippers → keep the board from sticking to nails on release.
• Interlocks → no power unless fixture is closed and vacuum/air is good.
  

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5.2.6 Electrical design (clean measurements, safe power)

• Guarding & shielding:Shielding: forGuarding nets are routed close to high-impedance ornets to shield them from noise, ensuring accurate leakage tests,and routehigh-resistance guardedmeasurements. tracesShielded nearharnesses senseare nets;used usefrom shieldedthe cablesfixture to the test matrix.
• KelvinPower-Up for low ohms:Strategy: useAlways 4-wire on shunts, fuses, MOSFET Rds(on), and battery paths; place pads adjacent to reduce loop area.
• Power-on strategy: dorun power-off shorts/open checksopens first,checks thenfirst. bringPower rails upmust be applied through current-limited power supplies with fast cut-off.off to prevent catastrophic failure in the event of a short.
• LoadsProbe &Life relays:Cycle: usePins solid-state where you can; keep relay coils away from tiny analog nodes; snub the inductive stuff.
• ESD discipline: ground the fixture frame; add wrist-strap posts; don’t turn your bed-of-nails intohave a staticfinite cannon.
  

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5.2.7 Program & coverage (make the hardware earn its keep)

• Netlist compare: import CAD and runlife learned100k vs– expected500k tocycles). catchProbes mis-mappedmust nails.
• Structuralbe first: opens/shorts/value/orientation → fast, nearly full coverage.
• Power-on next: rail presence, inrush/steady current, oscillator alive, reset behavior.
• BSCAN hooks: kick boundary-scan interconnect/pin toggles through the same fixture; program flash/MCU here to save FCT time.
• Guard-banding: crisp limits on Class-A risks (polarity, shorts); looser on passives where AOI already watches cosmetics.
  

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5.2.8 Maintenance & reliability (fixtures like small rituals)

• Probe life: track hit counts; many pins last 100k–500k cycles depending on tip and surface. Replacereplaced by refdes group or zone based on hit count tracking, before theycontact gonoise noisy.(random opens/false failures) starts to appear.
• Cleaning cadence:Self-Test: dryImplement brusha +fixture vacuumloopback daily; IPA swab for flux film weekly; never soak springs.
• Gaskets & seals:coupon inspect(or monthly;internal leakswiring turncheck) passesthat intoruns flicker-fails.
• Pressuredaily plateto foams:verify replacecontinuity whenand shiny/packed; they stop protecting parts when they stop springing back.
• Continuity self-test: a “fixture loopback” coupon proves harness/probe health before blaming boards.
• Spare kits: keep a board.probe kit (10% spares of every tip/force), gaskets, foams, pushers, springs.
  

Final

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Checklist: ICT Fixture Release

This table summarizes the mandatory checks for both the PCB design (DFT) and the physical fixture before it is released to the line.

5.2.9 Common pain → fast fixes

SymptomStatus	Likely causeItem	FirstDFT fixCheck (PCB Design)	Fixture Check (Fabrication)
Contact Access	RandomTest opens on same netPads	Worn/dirty≥ tip;95% boardstructural bowcoverage achieved on the bare PCB netlist.	ReplaceProbe amap smallmatches CAD; all required nets are zoneprobed of pins; add backup pins; clean plate.
Mechanical Integrity	HighBoard false shortsSupport	KeepoutsFlux film;marked too-aggressivefor tipsall tall/fragile components; tooling holes present.	Backup pinsWeekly IPAplaced swab;under switchBGAs/vulnerable crownsareas; →pressure cupsplate onverified thosefor padssafe clearance.
Electrical Safety	FailPower/Sensing	Kelvin onpads firstadded boardfor afterlow-ohm/high-current lunchnets.	Humidity/cleaningPower-on drift;sequence vacuum leak	Runis self-test couponcurrent-limited afterand idle;interlocked check(no gasketpower unless fixture is closed).
Maintenance	CrackedProbe parts post-ICTType	PressureAll platerequired hittingpads no-goare areaENIG or defined for acceptable probe tip wear.	Spare probe kitsUpdate top(10% stencilspares map;for addeach foampart islands;number) expandand keepoutscleaning supplies are stocked.
Program Lock	Low-ohm measurements noisySoftware	BSCAN (JTAG)2-wire setup;pads longare loopschained and verified in the netlist.	ProgramMove tois debugged and KelvinGolden Board; shortenverified; harness;sequence shield/guardruns inside the TAKT time budget.

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5.2.10 Release checklists (one for PCB, one for fixture)

PCB (DFT)

• Test pads per net (size per grid) with open mask, ENIG or good OSP
• Tooling holes + fiducials present; tall-part keepouts defined
• Kelvin pads on high-current/precision rails; JTAG/BSCAN pads/header placed
• Edge clearance for vacuum seals; pressure-post keepouts marked

Fixture

• Probe map matches CAD; backup pins under weak areas
• Tip styles/forces documented; spare kit stocked
• Gasket seals, pushers/strippers, interlocks verified
• Power-off → power-on sequence safe (current-limited)
• Self-test coupon passes; maintenance cadence posted
  

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A strong ICT and fixture design practice ensures defects are caught early, costs are contained, and functional testing is spared from chasing avoidable faults. This balance of precision and durability keeps throughput steady and product quality high.