2.4 Defect Atlas & Acceptance
IPC-A-610 / 7711 / 7721 workmanship cues that speed good decisions
Defect evaluation in electronics assembly is less about gut feeling and more about applying clear, shared rules. Industry standards like IPC-A-610 define what is acceptable on finished hardware, while IPC-7711/7721 outline safe rework and repair methods, along with when a fix is even permitted. These benchmarks, combined with customer-specific notes, set the baseline for decisions on everything from solder fillet quality to cosmetic blemishes. Quick visual cues—such as wetting shape, coverage, and symmetry—help inspectors make fast calls, while imaging tools like AOI and AXI verify hidden joints in BGAs and QFNs. Consistent classification, thorough documentation, and reference images keep judgment calls objective and defensible. With this discipline, acceptance becomes faster, fairer, and aligned across the entire production floor.
2.4.1 Why use the standards (and how)
- IPC-A-610 = what’s acceptable on shipped hardware (visual acceptance).
- IPC-7711/7721 = how to rework/repair defects safely and when a repair is even allowed.
- Your factory adds customer notes (cosmetics, special void limits) on top.
Post the class on the traveler (Class 2 typical industrial, Class 3 high-reliability). Inspectors decide fast by comparing to limit examples (photos, golden boards) tied to the correct class.
2.4.2 Class quick reference (mindset, not legalese)
(Use your customer’s spec sheet for exact numbers—they win any tie.)
2.4.3 Universal GO / NO-GO cues (works across parts)
- GO
- Wetting: solder thins out onto pad/lead (concave fillet; wetting angle typically <~60°).
- Coverage: pad edges visible, no exposed base metal on leads.
- Clean geometry: no bridges, no whiskers, no unintended solder balls.
- Identity: correct part, pin-1/polarity right, marking readable.
- NO-GO
- Non-wet/de-wet: beads sit like raindrops; grainy, matte islands.
- Bridges/shorts, tombstones/skew (chips), HIP (BGA seam).
- Damage: cracked bodies, chipped lenses, lifted pads/traces.
- Residue: sticky/charred deposits or foreign matter that could move.
If you’re on the fence, compare to the limit sample for this product and class; when in doubt on critical nets, fail → rework.
2.4.4 SMD (chips, SO/DFN/QFP) — fast cues
Tip: judge fillet shape and symmetry, not mirror shine (finish/mask color can fool you).
2.4.5 THT joints — what to look for in seconds
If marginal on fill, check design factors (hole size, thermals) and process data (flux/preheat). Don’t grade design sins as operator faults.
2.4.6 BGAs / area arrays — what images must show
- AOI can’t judge hidden balls; use AXI for acceptance.
- Accept: uniform collapse (“hourglass” ball shape), no missing balls, voiding within limit per spec (often ≤ ~25% per ball, dispersed).
- Reject: HIP (dark seam between sphere and paste), non-collapsed center field, large voids clustered at the pad interface, solder shorts between balls.
Escapes here hurt; bias to fail and route to rework if the image is ambiguous on Class 3.
2.4.7 QFN / LGA — easy pass/fail pattern
- Perimeter: continuous wetting line on all sides; even stand-off.
- Thermal pad: acceptable void percentage/pattern per customer (dispersed small voids better than one crater).
- Reject: lifted corners, starved sides, solder balls squeezing from under body, massive central voids.
2.4.8 Cosmetics & contamination (don’t debate—class it)
If it can move or conduct, it fails any class.
2.4.9 7711/7721 rework & repair — green/yellow/red
- Green (common rework): touch-up solder, part replacement (SMD/THT), wick and re-solder, BGA/QFN reflow per procedure.
- Yellow (controlled repair): pad repair with adhesive, trace repair, mask repair—follow 7721, qualified tech only, record it.
- Red (no-go without deviation): structural laminate damage, repeated heat beyond limits, repairs in prohibited zones for Class 3. If in doubt, MRB.
Always log attempt count and repair type on the ticket.
2.4.10 Fast decision trees (print these)
Bridged fine-pitch pins?
→ Flux + clean sweep with chisel → If still bridged, wick lightly → If mask damage risk or repeats → Rework station → If BGA-style hidden short → AXI.
Suspect BGA?
→ AXI slice at ball plane → If HIP/voids over limit → Rework → AXI verify.
THT low top-fill?
→ Check flux/preheat record → If in band, spot reflow with preheat → If chronic on same refdes/lot → Design/PCB lot review (hole/finish) + process CAPA.
2.4.11 Evidence that ends arguments (attach it)
- AOI/AXI images (before/after for rework) with refdes overlay.
- Macro photos of THT topside and suspect SMD joints.
- Process snippets: SPI map for the area, reflow plot, selective/wave settings.
- Class note (“Inspected to IPC-A-610 Class 3 + Customer Void Spec Rev C”).
Put it in the ticket—don’t paste into chat apps.
2.4.12 Pocket checklists
Inspector setup
- Product Class visible (2 or 3)
- Limit sample photos loaded (good / borderline / reject)
- AOI/AXI program rev matches traveler
Per board
- Polarity/markings correct; no missing/wrong parts
- SMD fillets wet & symmetric; no bridges/balls
- THT: clean bottom fillet, adequate top-side evidence for class
- BGAs/QFNs: image check (AXI/AOI 3D) within limits
- Cosmetics per class; nothing loose
If unsure
- Compare to limit sample for this product/class
- Escalate Class-A doubts to QE; attach image + class note
- Never “pass by vibe” on BGAs/QFNs—get the image
Bottom line: let IPC-A-610 tell you what “good” looks like, and 7711/7721 tell you how to fix what isn’t—within limits. Decide fast by class, fillet shape, and a few reliable cues (wetting, coverage, symmetry). When a call is close, use the limit photo and attach evidence. That’s how acceptance gets quick, fair, and consistent across the whole floor.