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4.4 Surface Prep & Cleanliness

Surface preparation is the quiet enabler of reliable traceability. A code that looks sharp when first applied can quickly fail if it sits on flux films, moisture, or glossy mask, leaving scanners blind and genealogy broken. Choosing the right moment to apply a mark—before or after reflow, cleaning, or coating—determines whether it survives the full manufacturing gauntlet. Adhesion and contrast come from clean, matte surfaces, while verification gates ensure every code earns its place in MES records. When these fundamentals align, identifiers endure ovens, washes, and audits with equal confidence.

4.4.1 Timing—clean, then mark (and where this happens in the flow)

Marks stick (and scan) only if the surface is clean and dry. Decide when each mark is applied, then make cleaning part of that step—not an afterthought.

  • Laser on solder mask (DPM): minimal prep—dust-free mask is enough. Best after reflow/clean so the code survives everything.
  • High-temp labels: wipe the area before application; use reflow-rated labels if they go on before the oven. If labels go on after cleaning, verify the board is dry and free of surfactants. (Methods in 15.2.)
  • Ink/legend printing: needs a clean, matte mask; print after a light clean, then cure per process. Avoid printing over residues you plan to wash later.

Reserve space on panel rails for big, scannable IDs so you’re not printing over active circuitry. (Panelization/rails are set in 2.5.)

Quick matrix: best timing by method

Method

Before reflow

After reflow (no clean)

After reflow and clean

Before coat

Laser on mask

OK (if needed)

Good

Best

Best (then coat clear of it)

High-temp label

Only reflow-rated

OK

Best (dry, clean surface)

Decide: under- or over-coat, then spec accordingly

Ink/legend

Risky (will see flux/heat)

OK on clean mask

Best (clean + cure)

Best if the code must live under coat

4.4.2 Adhesion killers (and how to dodge them)

Common pitfalls

  • Flux residues & no-clean films under a label or ink → weak adhesion, smeared text after wash. Clean the site immediately before marking. (See cleaning choices in 15.2.)
  • Silicone/oily contamination from gloves, tapes, or release agents → labels lift at corners; ink beads.
  • Glossy/low-energy mask → poor contrast for laser/ink; prefer matte mask in mark zones. (Planned in 4.2.)
  • Moisture trapped under labels after wash → bubbles, read failures. Let boards dry to spec before label. (Cleaning/handling in 15.2.)
  • Conformal coat creep under label edges → foggy codes, lifted corners. Decide under- vs over-coat and specify materials/windows in the coating plan (15.5).

Design-for-adhesion moves

  • Put dedicated mask windows for labels/ink (no pads, no OSP copper).
  • Keep marks off breakaway lines (V-score/tabs) to avoid edge damage at depanel. (Planned in panel drawing, 2.5.)

4.4.3 Verify print quality (don’t trust your eyes)

Every code should be printed/lasered → verified → logged. The verify step grades contrast, edge quality, and decodability and blocks WIP if the code fails.

  • Add a verification gate right after marking; use it to set a minimum pass grade for each symbology (e.g., DataMatrix vs Code 128). Wire pass/fail into MES/ERP via API. (4.5 covers scanners/APIs.)
  • 100% verification for unit IDs on the PCB; sampling may be okay for large carton labels (unless customer requires 100%).
  • Keep a golden sample board/label set and photo references for fast training and dispute resolution. (This lives with your Golden Pack & 4.5 assets.)

4.4.4 Cleanliness recipes (simple and sufficient)

Match the prep to the method—over-cleaning wastes time, under-cleaning wastes RMAs:

  • Laser: blow-off/vacuum dust; if post-wash, ensure boards are dry.
  • Labels: IPA-wipe or approved prep on mask/FR-4 only, then apply with pressure; avoid touching adhesive; respect dwell time before wash/coat. (Cleaning methods section gives options.)
  • Ink/legend: wipe, print, cure; don’t route/depannel near wet ink (fiber dust ruins edges). (Depanel in 15.3.)

4.4.5 What to write in the spec (so the floor gets it right)

In your Labeling & Traceability spec (Chapter 4), include:

  • Where and when to mark (rail vs PCB; pre/post reflow/clean/coat).
  • Surface prep for each method (e.g., “IPA wipe before label; verify dryness after wash”).
  • Verification gate (device, pass grade, reprint flow) and the API write-back to MES/ERP. (4.5 scans & databases.)
  • Coating interactions (under-/over-coat policy, mask windows).

4.4.6 Release checklist (print this)

  • Marking sequence defined (pre/post reflow/clean/coat) per code location.
  • Surface prep steps listed by method; operators trained.
  • Verification gate active; failing grades block WIP and trigger reprint.
  • Panel/PCB drawings keep marks off pads and break lines; rail zones reserved.
  • Coating plan covers labels/marks (materials and windows).



Conclusion: Defining clear prep steps, timing marks around cleaning and coating, and enforcing verification keeps IDs durable and data trustworthy. The payoff is genealogy that survives process stress and eliminates costly surprises during RMAs or audits.


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