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4.4 Surface Prep & Cleanliness

A traceability code is only useful if it's readable a year later. Surface preparation is the quiet enabler of reliable traceability. A codestep that looksensures sharpyour whenunit firstID applieddoesn't canlift, quickly fail if it sits on flux films, moisture,smear, or glossyfade mask,during leavingharsh scannersprocesses blind and genealogy broken. Choosing the right moment to apply a mark—before or afterlike reflow, cleaning, or coating—determinescoating. whetherA itmark survivesthat thesits fullon manufacturingflux, gauntlet.oil, Adhesionor andglossy contrastresidue comeis fromdestined clean,to matte surfaces, while verification gates ensure every code earns its place in MES records. When these fundamentals align, identifiers endure ovens, washes, and audits with equal confidence.fail.

4.4.1 Timing—clean,Process thenTiming: markWhen to Mark (andClean, whereThen this happens in the flow)Mark)

MarksThe stickrule (andis scan)simple: only if theThe surface ismust be clean and dry.dry Decideimmediately whenbefore eachthe mark is applied, then make cleaning part of that step—not an afterthought.

  • Laser on solder mask (DPM):applied. minimalYou prep—dust-freemust mask is enough. Best after reflow/clean sotime the codemarking survivesstep everything.
  • High-tempto labels: wipeavoid the areaharshest before application; use reflow-rated labels if they go on before the oven. If labels go on after cleaning, verify the board is dryprocesses and freeresidue of surfactants. (Methods in 15.2.)
  • Ink/legend printing: needs a clean, matte mask; print after a light clean, then cure per process. Avoid printing over residues you plan to wash later.

Reserve space on panel rails for big, scannable IDs so you’re not printing over active circuitry. (Panelization/rails are set in 2.5.)deposits.

Quick matrix:Matrix: bestBest timingTiming by methodMethod

Method

Before reflowReflow

After reflowReflow (no& clean)Cleaning

After reflow and clean

Before coatPurpose/Risk

Laser on maskMask (DPM)

OKOK, (ifbut needed)

GoodBest after cleaning

Best

BestMax (thenpermanence; coatno clearneed ofto it)worry about heat/solvents destroying the mark.

High-tempTemp labelLabels

Only if the label is reflow-rated

OK

Best (dry, clean surface)

Decide:Avoids under-the orhighest over-coat,heat/solvent thenstress; specsurface accordinglyis cleanest post-wash.

Ink/legendLegend Printing

Risky (will see flux/heat)

Best

OKRequires ona clean mask

Best (cleanfor +sharp cure)

Bestedges; if the codecuring must livebe underdone coatafter printing.

Planning Around Coating

Conformal coating is the final hurdle. The traceability mark must be accounted for in the coating process:

  • Under Coat: If the code lives under the coating, you need a high-quality mark that won't smear during application.
  • Over Coat: If the label goes over the coating, you must design a mask window—a small zone on the PCB where the coating is deliberately skipped—so the label adheres to the PCB mask/FR-4, not the slick coating itself.

4.4.2 Adhesion Killers & Cleanliness Recipes

Most mark failures come from contamination. You must identify and eliminate the adhesion killers (and howunique to dodgeyour them)line.

Common

Adhesion pitfalls

Killers (What Ruins the Mark)

  • Flux residuesResidues: &The no-biggest killer. No-clean flux films under a label or ink guarantee weak adhesion,adhesion smearedand textsmearing afterduring wash. Clean the site immediately before marking. (See cleaning choices in 15.2.)cleaning.
  • Silicone/oilyOily contaminationContamination: from gloves,Silicones, tapes, or releaseoily agentsresidue from gloves/fixtures cause labels to lift at corners;the corners and ink beads.to bead.
  • Glossy/low-energyGlossy Mask: A glossy solder mask reduces poorthe contrastsurface energy required for laser/ink;adhesive preferbonding and scatters laser light, degrading contrast. Use a matte mask in markthe zones.marking (Plannedzone infor 4.2.)better laser contrast and adhesion.
  • MoistureMoisture: trappedTrapped water vapor under labels after washwashing causes bubbles,bubbles readand failures.eventual Letlifting. boardsBoards must be dry to spec before label.labeling.

Cleanliness Recipes (Cleaning/handlingSimple inPrep)

15.2.)
  • Conformal coat creep under label edges → foggy codes, lifted corners. Decide under- vs over-coat and specify materials/windows in

    Match the coatingpreparation planstep (15.5).

  • to

    Design-for-adhesionthe moves

    • Put dedicated mask windows for labels/ink (no pads, no OSP copper).
    • Keep marks off breakaway lines (V-score/tabs)method to avoid edgeboth damage at depanel.under-cleaning (Plannedfailure) inand panelover-cleaning drawing,(wasting 2.5.)time/materials):

      • Laser Marking: Minimal prep required. A simple
        blow-off or vacuum to remove dust from the mask is usually sufficient.
      • Label Application: IPA-wipe (Isopropyl Alcohol) or approved mild prep on the mask/FR-4 area immediately before application. Apply firm pressure to the label to activate the adhesive.
      • Ink/Legend: Wipe, print, and then cure immediately. Do not print near running saw blades or depanel machines where fiber dust can ruin the print edge.

      4.4.3 VerifyVerification printand Specification

      Your quality assurance (don’tQA) process must treat the traceability mark as a critical process output, verifying its quality before the unit moves on.

      The Verification Gate

      Do not trust your eyes)eyes.

      Every code shouldmust be printed/lasered → verified by logged.a The verify step grades contrast, edge quality, and decodability and blocks WIP if the code fails.scanner.

      • Add a mandatory verification gate rightin your MES route immediately after marking;the usecode itis toprinted setor applied.
      • Set a minimum pass grade for each symbology (e.g., DataMatrix vsmust Codegrade 128)'B' or better).
      • If Wirethe pass/failcode intofails the grade, the system must MES/ERPblock WIP viaand API.trigger (4.5a coversdefined scanners/APIs.)
      • 100%reprint verificationor forrework unitflow. IDsThis onprevents bad codes from entering the PCB;finished samplinggoods may be okay for large carton labels (unless customer requires 100%).inventory.
      • Keep a golden sample board/label set andwith photo references in the work instruction for fastoperator training and fast dispute resolution. (This lives with your Golden Pack & 4.5 assets.)

      4.4.4

      The CleanlinessMarking recipes (simple and sufficient)

      Specification

      Match the prep to the method—over-cleaning wastes time, under-cleaning wastes RMAs:

      • Laser: blow-off/vacuum dust; if post-wash, ensure boards are dry.
      • Labels: IPA-wipe or approved prep on mask/FR-4 only, then apply with pressure; avoid touching adhesive; respect dwell time before wash/coat. (Cleaning methods section gives options.)
      • Ink/legend: wipe, print, cure; don’t route/depannel near wet ink (fiber dust ruins edges). (Depanel in 15.3.)

      4.4.5 What to write in the spec (so the floor gets it right)

      In yourYour Labeling & Traceability Spec specin (Chapterthe 4),Golden include:Data Pack must lock down these preparation requirements:

      • WhereProcess andSequence: Define the when to(e.g., mark"Post-wash, (railpre-conformal vs PCB; pre/post reflow/clean/coat)coat").
      • Surface prepPrep: forList eachthe exact cleaner and method (e.g., "IPA wipe and air dry for 30 seconds before label;label verify dryness after wash”application").
      • Verification gateVerification: (device,Mandate passthe grade,scanner reprintgrade flow)threshold and the API write-back to MES/ERP.ERP (4.5for scansthe &verification databases.)step.
      • CoatingDesign interactionsConstraints: (under-/over-coatReference policy,the mask windows).

      4.4.6 Release checklist (print this)

      • Marking sequence defined (pre/post reflow/clean/coat) per code location.
      • Surface prep steps listed by method; operators trained.
      • Verification gate active; failing grades block WIP and trigger reprint.
      • Panel/PCB drawingsdrawing, keepconfirming marksthat the mark is off padspads, off breakaway lines, and breakin lines;a raildedicated zonesmask reserved.
      • Coating planwindow covers(if labels/marksneeded (materialsfor andover-coat windows)policy).




      Conclusion: Defining clear prep steps, timing marks around cleaning and coating, and enforcing verification keeps IDs durable and data trustworthy. The payoff is genealogy that survives process stress and eliminates costly surprises during RMAs or audits.