4.4 Surface Prep & Cleanliness
A traceability code is only useful if it's readable a year later. Surface preparation is the quiet enabler of reliable traceability. A codestep that looksensures sharpyour whenunit firstID applieddoesn't canlift, quickly fail if it sits on flux films, moisture,smear, or glossyfade mask,during leavingharsh scannersprocesses blind and genealogy broken. Choosing the right moment to apply a mark—before or afterlike reflow, cleaning, or coating—determinescoating. whetherA itmark survivesthat thesits fullon manufacturingflux, gauntlet.oil, Adhesionor andglossy contrastresidue comeis fromdestined clean,to matte surfaces, while verification gates ensure every code earns its place in MES records. When these fundamentals align, identifiers endure ovens, washes, and audits with equal confidence.fail.
4.4.1 Timing—clean,Process thenTiming: markWhen to Mark (andClean, whereThen this happens in the flow)Mark)
MarksThe stickrule (andis scan)simple: only if theThe surface ismust be clean and dry.dry Decideimmediately whenbefore eachthe mark is applied, then make cleaning part of that step—not an afterthought.
Laser on solder mask (DPM):applied.minimalYouprep—dust-freemustmask is enough. Bestafter reflow/cleansotime thecodemarkingsurvivesstepeverything.High-temptolabels:wipeavoid theareaharshestbefore application; usereflow-ratedlabels if they go on before the oven. If labels go onafter cleaning, verify the board is dryprocesses andfreeresidueof surfactants. (Methods in15.2.)Ink/legend printing:needs a clean, matte mask; printafter a light clean, then cure per process. Avoid printing over residues you plan to wash later.
Reserve space on panel rails for big, scannable IDs so you’re not printing over active circuitry. (Panelization/rails are set in 2.5.)deposits.
Quick matrix:Matrix: bestBest timingTiming by methodMethod
Method | Before | After |
|
Laser on |
| Best |
|
High- | Only if the label is reflow-rated | Best |
|
Ink/ | Risky (will see flux/heat) | Best |
|
Planning Around Coating
Conformal coating is the final hurdle. The traceability mark must be accounted for in the coating process:
- Under Coat: If the code lives under the coating, you need a high-quality mark that won't smear during application.
- Over Coat: If the label goes over the coating, you must design a mask window—a small zone on the PCB where the coating is deliberately skipped—so the label adheres to the PCB mask/FR-4, not the slick coating itself.
4.4.2 Adhesion Killers & Cleanliness Recipes
Most mark failures come from contamination. You must identify and eliminate the adhesion killers (and howunique to dodgeyour them)line.
CommonAdhesion
pitfalls
- Flux
residuesResidues:&Theno-biggest killer. No-clean flux films under a label or ink→guarantee weakadhesion,adhesionsmearedandtextsmearingafterduringwash. Clean the site immediately before marking. (See cleaning choices in15.2.)cleaning. Silicone/oilyOilycontaminationContamination:from gloves,Silicones, tapes, orreleaseoilyagentsresidue→from gloves/fixtures cause labels to lift atcorners;the corners and inkbeads.to bead.Glossy/low-energyGlossy Mask: A glossy solder mask→reducespoorthecontrastsurface energy required forlaser/ink;adhesivepreferbonding and scatters laser light, degrading contrast. Use a matte mask inmarkthezones.marking(Plannedzoneinfor4.2.)better laser contrast and adhesion.MoistureMoisture:trappedTrapped water vapor under labels afterwashwashing→causesbubbles,bubblesreadandfailures.eventualLetlifting.boardsBoards must be dryto specbeforelabel.labeling.
Cleanliness Recipes (Cleaning/handlingSimple inPrep)
Match the coatingpreparation planstep (
Design-for-adhesionthe moves
Putdedicated mask windowsfor labels/ink (no pads, no OSP copper).Keep marksoff breakaway lines(V-score/tabs)method to avoidedgebothdamage at depanel.under-cleaning (Plannedfailure)inandpanelover-cleaningdrawing,(wasting2.5.)time/materials):- Laser Marking: Minimal prep required. A simple
blow-off or vacuum to remove dust from the mask is usually sufficient. - Label Application: IPA-wipe (Isopropyl Alcohol) or approved mild prep on the mask/FR-4 area immediately before application. Apply firm pressure to the label to activate the adhesive.
- Ink/Legend: Wipe, print, and then cure immediately. Do not print near running saw blades or depanel machines where fiber dust can ruin the print edge.
4.4.3
VerifyVerificationprintand SpecificationYour quality assurance (
don’tQA) process must treat the traceability mark as a critical process output, verifying its quality before the unit moves on.The Verification Gate
Do not trust your
eyes)eyes.Every code
shouldmust beprinted/lasered →verified→bylogged.aThe verify step grades contrast, edge quality, and decodability andblocks WIPif the code fails.scanner.- Add a mandatory verification gate
rightin your MES route immediately aftermarking;theusecodeitistoprintedsetor applied. - Set a minimum pass grade for each symbology (e.g., DataMatrix
vsmustCodegrade128)'B' or better). - If
Wirethepass/failcodeintofails the grade, the system mustMES/ERPblock WIPviaandAPI.trigger(4.5acoversdefinedscanners/APIs.) 100%reprintverificationorforreworkunitflow.IDsThisonprevents bad codes from entering thePCB;finishedsamplinggoodsmay be okay for large carton labels (unless customer requires 100%).inventory.- Keep a golden sample board/label
setandwith photo references in the work instruction forfastoperator training and fast dispute resolution.(This lives with your Golden Pack & 4.5 assets.)
Specification4.4.4The
CleanlinessMarkingrecipes (simple and sufficient)Match the prep to the method—over-cleaning wastes time, under-cleaning wastes RMAs:Laser:blow-off/vacuum dust; if post-wash, ensure boards are dry.Labels:IPA-wipe or approved prep onmask/FR-4 only, then apply with pressure; avoid touching adhesive; respect dwell time before wash/coat. (Cleaning methods section gives options.)Ink/legend:wipe, print,cure; don’t route/depannel near wet ink (fiber dust ruins edges). (Depanel in15.3.)
4.4.5 What to write in the spec (so the floor gets it right)In yourYour Labeling & Traceability Specspecin(Chapterthe4),Goldeninclude:Data Pack must lock down these preparation requirements:WhereProcessandSequence: Define the whento(e.g.,mark"Post-wash,(railpre-conformalvs PCB; pre/post reflow/clean/coat)coat").- Surface
prepPrep:forListeachthe exact cleaner and method (e.g.,“"IPA wipe and air dry for 30 seconds beforelabel;labelverify dryness after wash”application"). Verification gateVerification:(device,Mandatepassthegrade,scannerreprintgradeflow)threshold and the API write-back to MES/ERP.ERP(4.5forscansthe&verificationdatabases.)step.CoatingDesigninteractionsConstraints:(under-/over-coatReferencepolicy,themask windows).
4.4.6 Release checklist (print this)Markingsequencedefined (pre/post reflow/clean/coat) per code location.Surface prepsteps listed by method; operators trained.Verification gateactive; failing gradesblock WIPand trigger reprint.Panel/PCBdrawingsdrawing,keepconfirmingmarksthat the mark is offpadspads, off breakaway lines, andbreakinlines;araildedicatedzonesmaskreserved.Coating planwindowcovers(iflabels/marksneeded(materialsforandover-coatwindows)policy).
Conclusion:Defining clear prep steps, timing marks around cleaning and coating, and enforcing verification keeps IDs durable and data trustworthy. The payoff is genealogy that survives process stress and eliminates costly surprises during RMAs or audits.- Laser Marking: Minimal prep required. A simple