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3.1 Clean vs No-Clean Decisions

Residues left behind in assembly are often invisible, yet they can dictate whether a circuit survives years in the field or fails within months. The choice between cleaning and no-clean is more than a process preference—preference — it is a risk decision that ties together product reliability, regulatory compliance, and manufacturing economics. With geometry shrinking, voltages rising, and customer demands tightening, the ability to prove cleanliness becomes just as critical as achieving it.

3.1.1 The decisionRisk inDecision: oneClean minutevs. No-Clean

You’reThe determination to clean or not clean a Printed Circuit Assembly (PCA) is based on four critical factors. Manufacturers are choosing between leaving benign residue (no-clean) and removing residue (clean)clean, mandatory removal). Pick based on four things:

  1. Product riskRisk:: high-High-voltage, high-impedance, coated,safety-critical, safety-criticalor →assemblies requiring conformal coating generally mandate cleaning.
  2. Geometry: Dense, low-standoff packages like Bottom Termination Components (BTCs), such as QFNs and DFNS, lean heavily toward cleaning to prevent trapped residue.
  3. Process Control: No-clean requires exceptional process discipline — perfect flux dose, full preheat activation, and dry storage — to ensure the residue is truly inert.
  4. Environment & Compliance: If the final operating environment is harsh (high humidity) or if the customer contract (e.g., medical, aerospace) or local environmental regulations mandate cleaning, the decision is final.

3.1.2 When Cleaning is Mandatory

Cleaning is usually mandatory when the residue poses an electrical, chemical, or mechanical threat to the product's long-term function or coating adherence.

  • Coating/Potting: Residues compromise adhesion, leading to defects like fisheyes or under-film corrosion.
  • High Impedance/High Voltage: Residues can create leakage paths (reducing Surface Insulation Resistance, SIR), leading to signal detuning, current creepage, or dendritic growth (Electro-Chemical Migration, ECM).
  • GeometryContamination:: denseAny BTCsuse (QFN/DFN), low stand-off, underfills → leanof cleanWater-Soluble (OA) flux. mandates immediate and complete water washing.
  • ProcessHigh-Risk controlAssemblies:: Medical, automotive (Class 3), or dense assemblies with heavy flux dose/preheatusage proof,trapped dryunder boards,components.
tight

3.1.3 reworkCleanliness disciplineProof: →Validation Methods

Cleaning cannot be proven by sight alone. Validation requires measurable, scientific testing to ensure reliability goals are met. Use two layers of evidence—a quick screen for process control and a deep analysis for qualification.

Method

Type

Function and Mandate

ROSE / Ionics Test

Quick Screen (Trend Tool)

Measures the total amount of ionic residue (measured as NaCl equivalent). Used for daily process control trending.

Ion Chromatography (IC)

Deep Analysis (Qualification)

Identifies the specific species and quantity of ionic residues (e.g., chlorides, bromides). Mandatory for NPI and regulatory validation.

SIR (Surface Insulation Resistance)

Deep Analysis (Reliability)

Measures the integrity of the PCB surface under electrical bias and high humidity. Mandatory for high-voltage or high-impedance front-ends.

Contact Angle Test

Pre-Coating Check

Measures the uniformity of liquid dispersion on the board surface. Used to verify the surface is ready for conformal coating adhesion.

3.1.4 Process Control for No-Clean Assemblies

When a no-clean candecision work.

  • Customeris &made, environment:process ifdiscipline must be rigorous to ensure the contractresidue oris siteactivated permits say “clean,” you clean. If wastewater/VOC limits say “don’t,” design for no-clean + proof testing.

    • 3.1.2 What “no-clean” really means (and doesn’t)

    inert.

    • Means:Flux Dose: The flux residuesdose are designed tomust be precisely controlled (UV verification or weight test). non-ionic, non-corrosiveOver-application and maypooling beof left in place.
    • Doesn’t mean: “anything goes.” Over-application, poor preheat, or trapped residue under BTCsflux can still cause electrical leakage.
    • leakage,Preheat: SIRThe drop,reflow or coatingwave failurespreheat profile must guarantee full flux activation and complete solvent evaporation (Chapter 1.2).
    • Rework: Even in a no-clean environment, heavy rework often requires spot cleaning of the specific area to remove excess gel or partially cured residues that may trap moisture.

    Final Checklist: Cleanliness Decision and Validation

    Mandate

    Criteria

    Required Action

    Risk Assessment

    Product designated as High Voltage / High Impedance / Coated / Class 3.

    Full No-cleancleaning stillis needsmandatory; document the cleaning process in the Quality Plan.

    Flux System

    Flux core or liquid flux chosen is thin,Water evenSoluble films(OA).

    Mandatory aqueous cleaning immediately post-solder.

    No-Clean Process

    Flux application volume is thin and uniform; board is fully dried before storage.

    UV dose check and goodpreheat drying.profile

    You clean whenverification residuerequired risksper beatjob the cost/complexityfile.

    Proof of cleaning.Cleanliness


    3.1.3 When cleaningProduct is usuallyvalidated mandatoryvia SIR

    • Conformal coatingtesting or potting (adhesion, fisheyes, under-film corrosion).
    • High impedance / sensor front ends (MΩ–GΩ nodes), RF detuning risk.
    • High voltage / high humidity (creepage paths, dendrites, ECM/CAF).
    • OA (water-wash) flux used anywhere → must wash.
    • Low stand-off BTCs (QFNs/DFNs, LGA) with heavy flux usage.
    • Medical, aerospace, automotive Class 3 or contracts that call out cleaning.
    • Heavy rework residues trapped under packages.

    If two of those apply, plan a full clean and prove it.



    3.1.4 Cleanliness proof: how you’ll know it’s safe

    Use two layers of evidence—one quick, one deep.

    Quick screens (in-process)

    • ROSE/IONICS (NaCl equiv.) as a trend tool, not a gospel number.
    • White-glove/UV tracer: residue presence & evenness.
    • Contact angle/coat wetting test before conformal coat.

    Deeper methods (NPI & periodic)

    • Ion Chromatography (IC): species & location of ionic residues.
    • SIR tests (Surface Insulation Resistance) under humidity bias to prove no leakage paths.
    • Visual under BTCs (X-ray side gaps) if accessible.

    Pick methods in your Quality Plan and define when each runs (first articles, after chemistry change, quarterly).


    3.1.5 If cleaning: processes that actually work

    Process

    WhatROSE it uses

    Great for

    Watch-outs

    Aqueoustesting (DIconducted +periodically saponifier)

    Hotas DI,an chemistry,ongoing spray

    No-cleanprocess &control OAtrend on mixed tech

    Rinse quality matters (DI resistivity), drying BTCstool.

    Semi-aqueousCost & Compliance

    SolventEnvironmental +Health water& rinseSafety (EHS) permits are secured for wastewater or solvent usage.

    HeavyThe residues,Cost flux-richof wave

    EmulsificationPoor step adds complexity

    Vapor degreaseQuality (modern solvents)

    Low-residue solvents + vapor

    Tight gaps, no water spots

    Solvent management, safety, local regs

    Ultrasonic (targeted)

    Cavitation in bath

    Stubborn flux on robust parts

    AvoidCoPQ) nearavoided MEMS/relays—canmust damage them

    Control knobs (the 4 Ts + M):

    Time, Temperature, Turbulence (spray/impingement), Titration (chem strength), and Megohm DI rinse. Dry thoroughly (convection + vacuum assist if needed).


    3.1.6 If no-clean: make it truly no-drama

    • Flux dose proven (UV/weight), preheat hits activation band, no pooling.
    • Keep open time sane; reflow profile centered; boards dry (store & bake policy).
    • Rework uses minimal gel, spot clean if you flood, and prove with a local SIR/coat-wet check on risk builds.
    • Before coating: do a wetting/adhesion coupon or plasma cleanoutweigh the lot.
    OpEx


    3.1.7 Environment, safety, permits (don’t forget the building)

    • Aqueous: wastewater pretreat (pH/COD/solids), filters, permits; DI plant upkeep.
    • Solvents: VOC/worker exposure limits, fire codes, reclaim units.
    • Chemistry change control: SDS on file, operator PPE, spill kits, compatibility with plastics/labels.
    • Energy & water costs go in your business case.


    3.1.8 Cost picture (back-of-napkin)

    • Cleaning adds: equipment NRE + floor space + chemistry + energy + cycle time + wastewater management.
    • Cleaning saves: coating rejections, field leakage/corrosion, reworkcost of sticky residues, less “mystery” in harsh environments.

    Rule: if a product needs coating/HV/hi-Z reliability, the CoPQ avoided beats the cleaning OPEX almost every time.


    3.1.9 Decision matrix (print this)

    Context

    Geometry

    Coating/HV/Hi-Z

    Recommendation

    Proof you’ll run

    Consumer / benign env.

    Few BTCs, roomy standoff

    None

    No-clean, tight flux control

    UV coverage + occasional ROSE trend

    Industrial (humid)

    Mixed, some BTCs

    Maybe coating

    No-clean + targeted clean or full clean

    IC on NPI, coat wetting test per lot

    Automotive/Medical/Class 3

    Dense BTCs, underfills

    Coating and/or HV/Hi-Z

    Full clean (aqueous or vapor)

    SIR at NPI + periodic IC; coat adhesion

    High-voltage or sensing front-ends

    Any

    Yes

    Full clean

    SIR coupons per quartercleaning.



    3.1.10 Change control & validation

    • Treat cleaning choice as a spec in the control plan.
    • Any change in flux family, alloy, cleaning chemistry, or equipment → FA build with IC/SIR/wet tests.
    • Lock recipes (temps, speeds, chemistry titration, DI resistivity, dryer setpoints) with revision control.


    3.1.11 Pocket checklists

    Before NPI

    • Product risk (coating, HV/Hi-Z, class) scored
    • Geometry review (BTC density, stand-off)
    • Decide clean vs no-clean; document in Quality Plan
    • Define tests (ROSE trend, IC/SIR, coat wet) & frequency

    If cleaning

    • Chemistry chosen; titration & DI targets set
    • Wash/rinse/dry profile proven on worst-case boards
    • Wastewater/solvent management cleared with EHS

    If no-clean

    • Flux dose & preheat proofed (UV + temp)
    • Rework discipline & spot clean rules posted
    • Coating adhesion check in route (if coating later)

    Ongoing

    • Quarterly IC or SIR on a sample from harsh-duty products
    • Any residue-related reject triggers CAPA + method review


    Clear decision-making around cleaning ensures products avoid hidden reliability traps while balancing cost and environmental impact. By embedding cleanliness criteria into the quality plan and validating with the right proof methods, manufacturers gain both confidence in performance and efficiency in production.

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