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3.1 Clean vs No-Clean Decisions

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Choosingyears in the field or fails within months. The choice between cleaning and no-clean is more than a balancingprocess actpreference—it betweenis reliabilitya needs,risk decision that ties together product geometry,reliability, processregulatory discipline,compliance, and manufacturing economics. With geometry shrinking, voltages rising, and customer ordemands environmentaltightening, constraints.the “No-clean” fluxes are engineeredability to leaveprove benign,cleanliness non-corrosivebecomes residues, but they only stay safe when applied sparingly, heated correctly, and kept from pooling under low-clearance components. Cleaning—whether aqueous, semi-aqueous, or solvent-based—adds cost and complexity, yet it’s often mandatory for high-voltage, high-impedance, coated, or harsh-environment builds where residue could trigger leakage, corrosion, or coating defects. Proof is essential either way: quick in-process checks like UV inspection or ROSE trending catch issues early, while deeper methods like ion chromatography (IC) and surface insulation resistance (SIR) testing confirm long-term safety. Regulatory factors, wastewater handling, and operator safety also weigh heavily in the choice. By making the decisionjust as partcritical ofas theachieving quality plan and locking in verification steps, the cleaning approach becomes a controlled, evidence-backed process rather than a guess.

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3.1.1 The decision in one minute

You’re choosing between leaving benign residue (no-clean) and removing residue (clean). Pick based on four things:

  1. Product risk: high-voltage, high-impedance, coated, safety-critical → clean.
  2. Geometry: dense BTCs (QFN/DFN), low stand-off, underfills → lean clean.
  3. Process control: flux dose/preheat proof, dry boards, tight rework discipline → no-clean can work.
  4. Customer & environment: if the contract or site permits say “clean,” you clean. If wastewater/VOC limits say “don’t,” design for no-clean + proof testing.


3.1.2 What “no-clean” really means (and doesn’t)

  • Means: flux residues are designed to be non-ionic, non-corrosive and may be left in place.
  • Doesn’t mean: “anything goes.” Over-application, poor preheat, or trapped residue under BTCs can still cause leakage, SIR drop, or coating failures. No-clean still needs thin, even films and good drying.

You clean when residue risks beat the cost/complexity of cleaning.



3.1.3 When cleaning is usually mandatory

  • Conformal coating or potting (adhesion, fisheyes, under-film corrosion).
  • High impedance / sensor front ends (MΩ–GΩ nodes), RF detuning risk.
  • High voltage / high humidity (creepage paths, dendrites, ECM/CAF).
  • OA (water-wash) flux used anywhere → must wash.
  • Low stand-off BTCs (QFNs/DFNs, LGA) with heavy flux usage.
  • Medical, aerospace, automotive Class 3 or contracts that call out cleaning.
  • Heavy rework residues trapped under packages.

If two of those apply, plan a full clean and prove it.




3.1.4 Cleanliness proof: how you’ll know it’s safe

Use two layers of evidence—one quick, one deep.

Quick screens (in-process)

  • ROSE/IONICS (NaCl equiv.) as a trend tool, not a gospel number.
  • White-glove/UV tracer: residue presence & evenness.
  • Contact angle/coat wetting test before conformal coat.

Deeper methods (NPI & periodic)

  • Ion Chromatography (IC): species & location of ionic residues.
  • SIR tests (Surface Insulation Resistance) under humidity bias to prove no leakage paths.
  • Visual under BTCs (X-ray side gaps) if accessible.

Pick methods in your Quality Plan and define when each runs (first articles, after chemistry change, quarterly).



3.1.5 If cleaning: processes that actually work

Process

What it uses

Great for

Watch-outs

Aqueous (DI + saponifier)

Hot DI, chemistry, spray

No-clean & OA on mixed tech

Rinse quality matters (DI resistivity), drying BTCs

Semi-aqueous

Solvent + water rinse

Heavy residues, flux-rich wave

Emulsification step adds complexity

Vapor degrease (modern solvents)

Low-residue solvents + vapor

Tight gaps, no water spots

Solvent management, safety, local regs

Ultrasonic (targeted)

Cavitation in bath

Stubborn flux on robust parts

Avoid near MEMS/relays—can damage them

Control knobs (the 4 Ts + M):

Time, Temperature, Turbulence (spray/impingement), Titration (chem strength), and Megohm DI rinse. Dry thoroughly (convection + vacuum assist if needed).



3.1.6 If no-clean: make it truly no-drama

  • Flux dose proven (UV/weight), preheat hits activation band, no pooling.
  • Keep open time sane; reflow profile centered; boards dry (store & bake policy).
  • Rework uses minimal gel, spot clean if you flood, and prove with a local SIR/coat-wet check on risk builds.
  • Before coating: do a wetting/adhesion coupon or plasma clean the lot.



3.1.7 Environment, safety, permits (don’t forget the building)

  • Aqueous: wastewater pretreat (pH/COD/solids), filters, permits; DI plant upkeep.
  • Solvents: VOC/worker exposure limits, fire codes, reclaim units.
  • Chemistry change control: SDS on file, operator PPE, spill kits, compatibility with plastics/labels.
  • Energy & water costs go in your business case.



3.1.8 Cost picture (back-of-napkin)

  • Cleaning adds: equipment NRE + floor space + chemistry + energy + cycle time + wastewater management.
  • Cleaning saves: coating rejections, field leakage/corrosion, rework of sticky residues, less “mystery” in harsh environments.

Rule: if a product needs coating/HV/hi-Z reliability, the CoPQ avoided beats the cleaning OPEX almost every time.



3.1.9 Decision matrix (print this)

Context

Geometry

Coating/HV/Hi-Z

Recommendation

Proof you’ll run

Consumer / benign env.

Few BTCs, roomy standoff

None

No-clean, tight flux control

UV coverage + occasional ROSE trend

Industrial (humid)

Mixed, some BTCs

Maybe coating

No-clean + targeted clean or full clean

IC on NPI, coat wetting test per lot

Automotive/Medical/Class 3

Dense BTCs, underfills

Coating and/or HV/Hi-Z

Full clean (aqueous or vapor)

SIR at NPI + periodic IC; coat adhesion

High-voltage or sensing front-ends

Any

Yes

Full clean

SIR coupons per quarter




3.1.10 Change control & validation

  • Treat cleaning choice as a spec in the control plan.
  • Any change in flux family, alloy, cleaning chemistry, or equipmentFA build with IC/SIR/wet tests.
  • Lock recipes (temps, speeds, chemistry titration, DI resistivity, dryer setpoints) with revision control.



3.1.11 Pocket checklists

Before NPI

  • Product risk (coating, HV/Hi-Z, class) scored
  • Geometry review (BTC density, stand-off)
  • Decide clean vs no-clean; document in Quality Plan
  • Define tests (ROSE trend, IC/SIR, coat wet) & frequency

If cleaning

  • Chemistry chosen; titration & DI targets set
  • Wash/rinse/dry profile proven on worst-case boards
  • Wastewater/solvent management cleared with EHS

If no-clean

  • Flux dose & preheat proofed (UV + temp)
  • Rework discipline & spot clean rules posted
  • Coating adhesion check in route (if coating later)

Ongoing

  • Quarterly IC or SIR on a sample from harsh-duty products
  • Any residue-related reject triggers CAPA + method review



Bottom

Clear line:decision-making choosearound cleaning byensures risk,products geometry,avoid hidden reliability traps while balancing cost and contract,environmental notimpact. byBy habit.embedding Ifcleanliness you can prove thin, benign residue—and the product is forgiving—no-clean saves time and water. If you need coating, high impedance, or harsh-environment reliability, clean well and prove it with IC/SIR. Either way, write itcriteria into the quality plan and keepvalidating with the testsright alive.

proof methods, manufacturers gain both confidence in performance and efficiency in production.