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2.2 Copper Features and Vias

In CAD software, a trace is a vector line with zero resistance and infinite precision. On the factory floor, a trace is a physical copper structure subject to acid etching, thermal expansion, and electrical resistance. It is not just a connection; it is a component. If you treat copper features as abstract drawings, you will design boards that overheat, short-circuit, or cost triple the budget to manufacture.

Traces and Planes: The Horizontal Highways

Copper on a PCB serves two distinct purposes: Signal Transmission (Data) and Power Distribution (Current).

Trace Width and Spacing

The width of a trace determines how much current it can carry before it heats up. The spacing between traces determines the risk of a short circuit.

  • Engineering Reality: Copper is removed by chemical etching. If traces are too close (< 5 mil), the acid may not clear the copper between them, creating a bridge (short).
  • If a trace is too thin for the current → Then it acts as a fuse and burns open.
  • If traces are packed too tightly → Then manufacturing yield drops due to etching defects.

Pour vs. Trace

  • Trace: A narrow path for a specific signal.
  • Polygon Pour (Plane): A large area of solid copper, typically connected to Ground (GND) or Power.
  • Function: Planes provide a low-resistance path for return currents and act as a heat sink.
  • Rule: Maximize ground pours. A solid ground plane reduces electrical noise (EMI) and stabilizes signal integrity.

Vias: The Vertical Interconnects

A PCB is a 3D structure. Vias are the elevators that move signals between layers. They are formed by drilling a hole through the board and plating the walls with copper (plating).


1. Plated Through-Hole (PTH)

  • Definition: A hole drilled all the way through the board, from Top to Bottom.
  • Use Case: The standard for 95% of connections. Reliable and cheap.
  • Constraint: It consumes space on every layer, even those it doesn't connect to. A wire crossing the board on Layer 3 must route around the via barrel.

2. Blind and Buried Vias (HDI Technology)

  • Blind Via: Connects an outer layer to an inner layer (e.g., Layer 1 to 2) without penetrating the whole board.
  • Buried Via: Connects internal layers only (e.g., Layer 2 to 3) and is invisible from the outside.
  • Engineering Reality: These require sequential lamination and laser drilling.
  • If you use Blind/Buried vias → Then the bare board cost increases by 30% – 50%. Use only when density demands it (e.g., smartphones).

3. Via-in-Pad

  • Definition: Placing a via directly inside a component's solder pad.
  • Risk: During reflow, liquid solder flows down the hole ("wicking"), leaving the component leg with no solder.
  • Control: The via must be "capped" or filled with epoxy and plated over (POFV). This adds significant cost.
  • If you place open vias in pads → Then expect massive solder joint failures.

The Annular Ring: Accounting for Drill Drift

A drill bit is a flexible steel tool spinning at high speed. It wanders. The "Annular Ring" is the donut of copper pad remaining around the drilled hole.


The Drill Tolerance

If you define a 0.2 mm hole inside a 0.25 mm pad, you have a ring of only 0.025 mm.

  • Engineering Reality: Mechanical drills have a wandering tolerance of ±0.1 mm (or more).
  • If the pad is too small → Then the drill will miss the center and break out of the copper ("Breakout"), severing the connection.
  • Rule: Ensure the pad diameter is at least 0.3 mm larger than the drill diameter for standard reliability.

Pro-Tip: "Teardrops" add extra copper at the junction where a trace meets a pad or via. Always enable Teardrops in your CAD tool. They provide a mechanical stress relief and a safety margin against drill breakout.

Final Checklist

Feature

Standard Spec

High Cost / High Risk

The Engineering Rule

Trace Width

≥ 6 mil (0.15 mm)

< 4 mil (0.10 mm)

Wider is safer. Only go thin if space is critical.

Clearance

≥ 6 mil (0.15 mm)

< 4 mil (0.10 mm)

Tighter spacing increases the risk of etching shorts.

Via Type

Through-Hole (PTH)

Blind / Buried

Avoid HDI vias unless the board is too small for PTH.

Annular Ring

+0.3 mm over drill

+0.15 mm over drill

Pad size must account for drill wander.

Via-in-Pad

Avoid

Required

Must be "Capped and Plated" to prevent solder theft.